Clear the noise. Keep what works.

VeriSim

VeriSim

15 GitHub stars

Verilog simulator built by compiling Icarus Verilog to WebAssembly. No server, no install: edit, compile, simulate, view waveforms, and synthesize to a gate-level or RTL schematic

💻 DevelopmentLicense: GPL-2.0
#simulate#verilog#schematic
VeriSim · TlumAI